PCB design for noise budget, voltage tolerance, do you understand?

In high-speed PCB design, a large part of the work is to make noise budgets, and to plan the noise level of various noise sources in the system. This involves a very basic but very important concept: voltage tolerance.

Voltage margin is the difference between the output of the driver and the sensitivity of the receiver input in the worst case. Many devices are input voltage sensitive.

For the driver terminal output high level is not lower than VOH min, the output low level is not higher than VOL max. For the input of the receiving end, as long as it is higher than VIH min, it can ensure reliable reception of logic 1, as long as it is lower than VIL max to ensure that logic 0 is received. However, if the input voltage is in the region between VIH min and VIL max, it may be judged as 1 by the receiving circuit, and may also be judged as 0, so the input voltage cannot be in this unstable region for the receiving circuit. In terms of high level output and input relationship, there is a difference between the minimum output value and the minimum allowable input value, which is the high voltage tolerance.

That is: high level voltage tolerance = VOH min - VIH min . The same low level voltage tolerance = VIL max - VOL max .

Voltage tolerance provides a buffer zone for handling various undesirable factors in the processing circuitry, allowing the system to tolerate signal distortion during transmission and reception to some extent. The voltage tolerance plays an important role in the system noise budget design. The total noise of the system cannot exceed the voltage tolerance. Otherwise, the system will not work normally when the signal enters the unstable region of the receiving end.

There are always undesired factors in the actual system, causing the signal to deteriorate and introducing noise. Noise is introduced in the following situations:

1. Due to the existence of loop impedance, a voltage drop is inevitable in the loop, resulting in a ground potential difference between the logic devices. The signal sent by the gate circuit is a fixed potential at the local ground potential. If there is an offset between the reference potential of the transmitting end and the receiving end, then another potential will be received.

2. The threshold level of some logic series products is a function of temperature. Signal transmission from a lower temperature gate to a higher temperature gate may have a reduced tolerance or a negative tolerance.

3. The rapidly changing return signal current flows through the ground path inductance, causing a change in the ground voltage between the logic devices. These ground voltage differences have the same effect on the received signal potential as the DC ground potential difference described above. This is a form of inductive crosstalk.

4. Signals on adjacent lines may be coupled to each other through their mutual capacitance or mutual inductance, causing crosstalk to a specified line. Crosstalk is superimposed on the expected received signal, possibly skewing a good signal to the adjacent switching threshold.

5. Ringing, reflection, and long lines distort the shape of the binary signal. The signal at the receiving end is smaller (or larger) than the transmitting end. The tolerance is a tolerance for signal distortion.

The first two cases exist in all electronic systems, regardless of their speed. The latter three are unique to high speed systems. These three high-speed effects vary with the size of the transmitted signal: the greater the signal return current, the higher the ground potential difference. The larger the signal voltage (or current), the more crosstalk is generated, and the larger the transmitted signal, the more severe the ringing and reflection. Therefore, no matter whether it is a low-speed or high-speed system, noise is inevitably introduced, and the voltage tolerance gives the system room to adjust.