Crystal Load Capacitor External Matching Capacitor Calculation and Crystal Oscillation Circuit Design Experience Summary (IV)

Principle and design principle of crystal oscillation:

The crystal oscillator pins of various logic chips can be equivalent to a capacitor three-point oscillator. The internal of the crystal oscillator pin is usually an inverter, or an odd number of inverters are connected in series. At the crystal output pin XO and the crystal input pin XI Between a resistor and a CMOS chip, it is usually between M and tens of MΩ. The resistor is already included in the pin of many chips, and the external pin is not connected. This resistor is for the inverter. At the initial state of the oscillation and the linear state, the inverter acts like an amplifier with a large gain to facilitate the start-up.

The quartz crystal is also connected between the input and output of the crystal pin. It is equivalent to a parallel resonant circuit. The oscillation frequency should be the parallel resonant frequency of the quartz crystal. The two capacitors next to the crystal are grounded, which is actually the capacitance of the three-point circuit. Capacitor, the grounding point is the voltage dividing point. Taking the grounding point, that is, the voltage dividing point as the reference point, the input and output of the oscillating pin are inverted, but a positive feedback is formed from the parallel resonant circuit, ie, the ends of the quartz crystal. In order to ensure continuous oscillation of the circuit. In the design of the chip, these two capacitors have already been formed. Generally, the two capacities are equal. The capacity varies according to the process and the layout, but it is relatively small, not necessarily suitable for a wide frequency. range.

The external connection is about PF to tens of PF, depending on the frequency and the characteristics of the quartz crystal. It should be noted that the values of the two capacitors in series are connected in parallel to the resonant tank, which will affect the oscillation frequency. When two electric When the capacity is equal, the feedback coefficient is 0.5, which can generally satisfy the oscillation condition. However, if it is not easy to start or unstable, the input terminal can reduce the capacitance to the ground, and increase the value of the output to increase the feedback amount.

Design considerations:

1. Keep the signal line between the crystal oscillator, external capacitor (if any) and IC as short as possible. When a very low current is passed through the IC crystal oscillator, if the line is too long, it will have a very sensitive effect on EMC, ESD and crosstalk. Long lines also add parasitic capacitance to the oscillator.

2. As far as possible, arrange other clock lines and frequently switched signal lines away from the crystal connection.

3, beware of crystal and ground traces

4. Ground the crystal case

If the actual load capacitance is improperly configured, the first will cause the error of the line reference frequency. In addition, if the amplitude of the oscillation of the crystal oscillator is decreased (not at the peak point) on the transmitting and receiving circuit, the signal strength and signal noise of the mixed signal are affected. When the waveform is peaked, the load resistance can be increased (tens of K to several hundred K) when it is distorted. To stabilize the waveform, a feedback resistor of about 1M is connected in parallel.